"Bridge" chipset (ST) supporting iDP standard

STMicroelectronics has released the industry's first "bridged" chipset that supports the iDP (Internal DisplayPort) standard solution for the conversion of iDP standard to LVDS (low voltage differential signaling) in next-generation LCD TVs. The new chipset is compatible with the iDP interface standard solution recently submitted by STMicroelectronics and LG Display to the Video Electronics Standards Committee (VESA) TV Panel Working Group.

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The DisplayPort interface is a market-proven industry-standard technology and is a royalty-free open VESA standard. iDP is an advanced interface technology developed on the basis of the DisplayPort interface for connecting a TV controller system in a TV chassis. Chip-on-chip (SoC) and TV panel timing controllers.

ST's new iDP-to-LVDS bridge chipset is based on DisplayPort technology and features low-power design and low electromagnetic interference (EMI), which will provide TV manufacturers with robust interoperability and cost-effectiveness, enabling customers to Through a new interface standard certification in a short period of time, the company quickly launched new TV products to seize market opportunities.

ST's first iDP-based solution consists of an iDP transmitter STiDP888 and an iDP receiver STiDP880. Together, the two chips form a complete high-bandwidth interface converter that redefines the panel interface, reducing the number of wires, connectors, and signal lines, helping to simplify panel design and reduce the cost of interface implementation for TV manufacturers.

The chipset solution includes a single-chain iDP interface that delivers uncompressed up to 12.96 Gbps bandwidth between TV system-level chips and LCD panel modules via four pairs of low-cost twisted pair or FFC (flat cord) Pixel signal stream. STMicroelectronics' iDP transmitters and receivers are highly scalable: each chipset supports FHD (Full HD) video at 120Hz refresh rate (1080p/30-bit per pixel); both support FHD-240Hz Refresh rate LCD panel.

Both the transmitter and receiver chips integrate a high-speed four-way LVDS interface to convert signals between traditional four-way LVDS and iDP interfaces to meet market demands during the transition to technical standards. These products will provide TV manufacturers with the highest level of flexibility and a smooth transition to the iDP standard.

In addition, spread spectrum technology combined with iDP's self-synchronization, data scrambling and inter-channel removal of the tooth structure, the chipset no longer requires external anti-EMI components, which can save more cost.

The STiDP888 and STiDP880 are available in a 164-ball LFBGA package and are available now.

More about iDP technology: The iDP standard leverages the most basic technology of the market-proven DisplayPort interface to connect TV controller system-on-chip and panel timing controllers in a TV chassis, providing highly robust interoperability and cost-effectiveness . iDP has a 3.24 / Gbps transmission rate per differential pair. It takes only 17 signals (8 differential pairs and one hot plug detection (HPD)) to transmit full HD 240Hz per-color 10-bit video over the iDP link. Signal), while a normal LVDS link requires 96 signals. With dynamic channel count adjustment, iDP can support pixel rate changes due to events, such as video rate changes and 3D stereo display timing, without creating visual discontinuities on the display. The openness of the iDP standard can further increase cost-effectiveness. Since there is no need to consider patent royalties, the standard will attract many component manufacturers to participate in market competition.

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