Multi-core processing system based on Mailbox inter-core mechanism

Abstract: With the rapid development of the electronics industry, industry and commerce, and the militarization industry, more and more complex operations have been unable to use algorithmic optimization to greatly improve execution speed. In order to solve increasingly complex computing problems, multi-core processing is bound to be inevitable. Becoming a general trend. So proceed from the multi-core and single-core comparison, use Xilinx's XUP Virtex-2 Pro to build a multi-core processing platform (based on the Shared Memory communication mechanism) and a single-core platform, and run the same image processing algorithm DCT separately. On the FPGA-based single-core and multi-core hardware platforms, the experimental results are observed, and the time required for multi-core and single-core operation and resource consumption are compared. The final result strongly illustrates the absolute advantages of multi-core in image processing.

Embedded applications based on FPGA have been playing a very important role in communication, consumer electronics, medical, industrial and military fields in recent years. Compared with other chips, FPGA design is used. The circuit is fast in execution, short in time to market, low in cost, high in reliability, and easy to maintain and upgrade. It is these advantages that make the application of FPGA more and more widely, which is favored by designers in various fields. But it is about it. Research on multi-core systems has been rarely studied. Based on the study of various inter-core communication mechanisms, this paper proposes a multi-core processing system based on Mailbox inter-core mechanism, in which Xilinx soft core processing is integrated. Microblaze, which reduces the cost of using multiple signal processing boards but also saves space, and proposes a new solution for better use of multi-core systems.

In the design of multi-core embedded systems, the inter-core communication mechanism and the inter-core transmission bus are very particular when used. The commonly used buses are: OPB bus, PLB bus, XCL bus, FSL bus, LMB bus, and multi-core communication system. Common communication mechanisms and communication means include: Mailbox, Mu-tex, Shared Memory, Interrupt, PLBv46_PLBv46 Bridge, FSL interconnection mechanism, DMA Controller, etc. as shown in Figure 1.

The PLB bus (Processor Local Bus) bus includes a bus control unit. A watchdog timer and separate address and read/write data path units. In addition, an optional DCR (Device Control Register) slave interface is included. To provide access to the bus error status register.

The LMB bus is mainly used to connect on-chip BRAM (BlockRAM). In order to complete access in one clock cycle, LMB uses the minimum control signal and simple protocol. It is divided into two types of interfaces: instruction register DLMB and data register ILMB. These interfaces are only connected to the BRAM.

Shared memory is a typical fast asynchronous communication mechanism, because it makes zero copy possible. It is very suitable for large data sharing of more than 1 000 B. Shared memory can be divided into two types: BlockRAM and external memory DDRR. .

RGB, YCrCb are two color spaces that are often used to represent colors. In applications, it is often necessary to implement conversion between them. For example, YCrCb space is often used in face detection because general images are based on RGB space. In the RGB space, the skin color of the face is greatly affected by the brightness, so the skin color point is difficult to separate from the non-skin color points. That is to say, after the space is processed, the skin color points are discrete points, and a lot of embedded colors are embedded in the middle. Non-skin tone, which brings problems for skin area calibration (face calibration, eyes, etc.). If you convert RGB to YCrCb space, you can ignore the effect of Y (brightness), because the space is affected by brightness, skin color will Produce a good cluster.

The DCT transform is a very important part of the video compression codec and is widely used in coding algorithms for various video formats, such as:
JPEG, MPEG1, MPEG2, H.264, etc.

The DCT first divides the overall image into N&TImes;N pixel blocks, and then performs DCT transform on the N&TImes;N pixel blocks one by one. Since the high frequency components of most images are small, the coefficients corresponding to the high frequency components of the image are often zero. In addition, the human eye is less sensitive to the distortion of high-frequency components, so coarser quantization can be used. Therefore, the digital rate of transmitting transform coefficients is much smaller than the digital rate used to transmit image pixels. The image passes through the inverse discrete after reaching the receiving end. The cosine transform returns to the sample value, although there will be some truth, but the human eye is acceptable, the formula is as follows:

Where C(u) and C(v) are equal to 1 2 when uv is 0, and are 1 in all other cases, and x, u = 0,1,2,...,M – 1 ; y,v = 0, 1,2,...,N – 1.

The software development environment used in this article is the ISE 10.1 development kit from Xilinx. The hardware development platform uses Xilinx's XUP Virtex-2 Pro [8-9] development board, while the ISE 10.1 development kit embeds the EDK development kit. Integrated Xilinx Platform studio, SoftwareDevelopment, library file generator, compiler tools and other development modules), which greatly facilitates the development of software and hardware.

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