SP Devices' ADQ7 digital sampler has one or two 14-bit acquisition channels for AC or DC coupled signals, with a total acquisition rate of 10 samples/sec in single channel mode (5G samples/sec in dual channel mode). And for a variety of bus formats, such as MTCA.4, USB3, PCIe, PXIe and 10 Gbit Ethernet, the maximum sustained data transfer rate can be maintained at 5 Gbytes / sec (over PCIe).
Figure 1: Appearance of the ADQ7DC
An obvious flaw can be obtained from the above parameters: the bus bandwidth is too small, which makes the outbound module unable to obtain complete, continuous digitized data, so it needs to improve the problem from three aspects: adding local storage, optimizing onboard processing and reducing data block size. .
Xilinx Kintex UltraScale FPGAs offer cost-effective adaptations that provide enough onboard storage and optimized onboard processing.
See the picture below:
Figure 2: Frame diagram of DC-coupled ADQ7DC
On the left side of the block diagram, two pairs of high-speed ADCs (acquisition speed of 10 Gsamples / sec) pass data directly to the Kintex UltraScale FPGA, performing multiple signal processing steps, including calibration, gain and offset adjustment, triggering, and any user-defined Real-time signal processing. These processing blocks can be customized using SP Devices' development kits, as well as multiple signal processing modules developed by SP Devices for ADQ7, including:
Advanced Time Domain Firmware (-FWATD)
Pulse data (-FWPD)
Software Defined Radio (-FWSDR)
As can be seen from the block diagram, the Kintex UltraScale FPGA also manages the overall timing control of the ADQ7 module and manages the data stream through the FIFO, in and out of the 4Gbyte DRAM data stream and the various interface families provided by the module (in this block diagram, PCIe is used as an example).
The digitizer implements most of the functions in a complex system by using Xilinx fully programmable devices. The Kintex UltraScale FPGA in the design implements all functions except ADC, clock, memory and some interface hardware. Other functional modules are well integrated in an UltraScale device, and are capable enough to allow for the addition of user-defined functions. This flexibility greatly facilitates system designers and is extremely cost effective.
More information about the ADQ7 digital sampler can be viewed directly.
Kintex UltraScale FPGA:
The Kintex UltraScale is the best cost-effective 20nm device, including mid-range devices, next-generation transceivers, and low-cost packaging, with the highest signal processing bandwidth in its class for optimal performance and cost-effectiveness. The series is ideal for packet processing in 100G network and data center applications as well as DSP-intensive processing for next-generation medical imaging, 8k4k video and heterogeneous wireless infrastructure.
Figure 3: Kintex UltraScale Suite
In this digital sampler, Xilinx's Kintex UltraScale FPGAs are used to synchronize multiple functions and are positively advantageous. As shown in the above figure, the FPGA implements some functions, and the UltraScale device performs other functions and adds functions similar to user customization, which greatly enhances the convenience of the designer.
to sum up:Xilinx has once again achieved breakthrough value in new areas. Emerging functions such as convenience and customization greatly enhance the productivity of designers and have a very high cost performance. SP Devices is dedicated to devices such as digital samplers and continues to innovate and invent more practical products. I believe that with the joint efforts of Xilinx and application companies, our information age will become more and more exciting.
Disclaimer: This article is compiled by the electronic innovation network Xilinsi Chinese community, reproduced with the author, source and original link, otherwise, this website will retain the right to pursue its legal responsibility.
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